Embodiments of the present disclosure relate to a memory controller, and more particularly to a memory controller which is capable of generating a duty ratio-adjusted clock signal for strobing data, and/or a system having the same.
For a stable input or output of data in a memory device, a duty ratio of a data strobe signal related to the input/output of the data should be maintained at a 50:50 ratio.
Even if the memory controller generates the data strobe signal having an exact duty ratio of 50:50 and transmits the generated data strobe signal to a memory device, the duty ratio of the data strobe signal fed back to the memory controller can be changed due to an RC delay on a signal line connected between the memory controller and the memory device, a change in a load capacitance of the memory device, or an internal logic (for example, a return clock signal generator) of the memory device.
When the memory controller reads data from the memory device using the data strobe signal, and the duty radio of the data strobe signal is changed, the memory controller cannot exactly process the data that is output from the memory device in some cases. Moreover, when the duty ratio of the data strobe signal is changed, speed for transmitting data to the memory controller may be changed.